At Oxford Quantum Circuits (OQC) we are building quantum computers to enable life-changing discoveries : from new drug modelisation to longer-lasting battery technology and portfolio optimisation. We are developing a cloud based quantum computer service – Quantum Computing as a Service (QCaaS) – to help our customers improve their operations and trailblaze new commercial and scientific approaches.
Our team is composed of 20 people with various backgrounds in quantum physics, nanotechnologies, hardware, and software. We are all bound by the desire to put OQC at the forefront of the quantum revolution and build a technology with practical applications in mind.
The FPGA plays an integral role in the control of our quantum computer. It is both the source and destination of the microwave pulses used to control and readout our qubits, and acts as both a pulse sequencer and a waveform digitizer. At OQC we are looking to develop our in-house solution further to increase our capabilities.
As an FPGA design engineer, it is your role to understand the requirements of quantum and software engineers before devising and delivering reliable and robust solutions. You will have experience designing at a system level but be comfortable implementing, verifying and testing subblocks.
- Developing solutions to meet quantum / software engineer requirements
- System and block level design and verification using VHDL or Verilog
- Managing complex, FPGA based projects through to sign-off
- Ensuring designs meet timing, utilisation and power requirements
- Low-level driver development ideally using Python
- Documenting design ideas, specifications and test results
QUALIFICATIONS AND SKILLS
- Bachelor’s degree (or higher) in engineering or similar
- 3+ years of commercial FPGA design and development experience
- Experience owning a complex project through to completion
- Proven track record of system and block level design and verification using HDLs, preferably Verilog
- Proficiency with FPGA tools, ideally Vivado, i.e. using IP blocks, defining constraints, and analysing outputs
- Experience in the design and implementation of DSP for FPGA
- Some experience writing FPGA drivers, ideally in Python
- Experience working with mixed signal systems
- Scripting FPGA design flow using TCL
- Advanced verification techniques such as UVM
- Experience working on latency critical designs
LOCATION & TRAVEL
OQC’s office is located in Shinfield, Reading. There will be a requirement for occasional travel throughout the UK and elsewhere abroad for conferences, meetings and engineering visits.
Send us a cover letter and an annotated version of this role description, highlighting your strengths and weaknesses, at firstname.lastname@example.org. Applications without an annotated version of this role description will not be considered.
We look forward to hearing from you!